
SanDisk Industrial Grade CompactFlash 5000 Product Manual
© 2007 SanDisk® Corporation 32 July 2007
Table 26: Card Configurations
Conf5 Conf4 Conf3 Conf2 Conf1 Conf0 Disk Card Mode
0 0 0 0 0 0 Memory Mapped
0 0 0 0 0 1 I/O Mapped; any 16-byte system
decoded boundary
0 0 0 0 1 0 I/O Mapped; 1F0-1F7/3F6-3F7
0 0 0 0 1 1 I/O Mapped; 170-177/376-377
3.4.3
Card Configuration and Status Register (Address
202h in Attribute Memory)
The Card Configuration and Status Register contain information about the
condition of the card
.
Operation D7 D6 D5 D4 D3 D2 D1 D0
Read Changed SigChg IOis8 0 0 PwrDwn Int 0
Write 0 SigChg IOis8 0 0 PwrDwn 0 0
Bit Name Description
D7 Changed Indicates that one or both of the Pin Replacement Register CRdy, or
CWProt bits are set to "1". When the Changed bit is set, -STSCHG Pin
46 is held low if the SigChg bit is a "1" and the card is configured for
the I/O interface.
D6 SigChg The host sets and resets this bit to enable and disable a state-change
"signal" from the Status Register, the Changed bit control pin 46 the
Changed Status signal. If no state change signal is desired, this bit
should be set to zero "0" and pin 46 (-STSCHG) signal will be held high
while the card is configured for I/O
D5 IOis8 The host sets this bit to one "1" if the card is to be configured in an 8-bit
I/O mode. The card is always configured for both 8- and 16-bit I/O, so
this bit is ignored.
D2 PwrDwn This bit indicates whether the host requests the card to be in the power
saving or active mode. When the bit is "1" the card enters a power
down mode. When "0", the host requests that the card enter the active
mode. The PCMCIA Rdy/-Bsy value becomes BUSY when this bit is
changed. Rdy/-Bsy will not become Ready until the power state
requested has been entered. The card automatically powers down
when it is idle and powers back up when it receives a command
D1 Int This bit represents the internal state of the interrupt request. This value
is available whether or not I/O interface has been configured. This
signal remains true until the condition that caused the interrupt request
has been serviced. If interrupts are disabled by the -IEN bit in the
Device Control Register, this bit is a "0".
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