SanDisk CompactFlash 5000 Manual descargar pdf (Pagina 33)

SanDisk Industrial Grade CompactFlash 5000 Product Manual

Note: SanDisk CompactFlash Memory cards do not assert an -IORDY signal.

Figure 9: Register Transfer to/from Device

Notes: 1) Device address consists of signals -CS0, -CS1 and -DA(2:0).

2) Data consists of DD(7:0).

Table 21: Register Transfer to/from Device

PIO Timing Parameters Mode 4 (ns)

t0 a Cycle time (min.) 120

t1 Address valid to IORD-/IOWR- setup (min.) 25

t2 a IORD-/IOWR- pulse width 8-bit (min.) 70

t2i a IORD-/IOWR- recovery time (min.) 25

t3 IOWR- data setup (min.) 20

t4 IOWR- data hold (min.) 10

t5 IORD- data setup (min.) 20

t6 IORD- data hold (min.) 5

t6z b IORD- data tri-state (max.) 30

t9 IORD-/IOWR- to address valid hold (min.) 10

* t0 is the minimum total cycle time, t2 is the minimum command active

time, and t2i is the minimum command recovery time or command

inactive time. The actual cycle time equals the sum of the actual command

active time and the actual command inactive time. The three timing

requirements of t0, t2, and t2i shall be met. The minimum total cycle time

requirements are greater than the sum of t2 and t2i. This means a host

implementation may lengthen either or both t2 or t2i to ensure that t0 is

equal to or greater than the value reported in the devices IDENTIFY

DEVICE data. A device implementation shall support any legal host

implementation.

b. This parameter specifies the time from the negation edge of /IORD to the

time that the data bus is no longer driven by the device (tri-state).

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SanDisk CompactFlash 5000 Manual Pagina 33